Portable and distributed multi-media applications are driving an ever increasing demand for computational performance at acceptable power consumption levels, both at the client and the infrastructure sides. At the same time, the software content driven by functional requirements is constantly increasing and is already in the millions of lines of code in some devices. Parallel processing offers power consumption relief but it brings new challenges as well. A number of multi-core chips are already in the market and with shrinking silicon geometries we will see an increasing number of (homogenous and heterogeneous) cores per chip.
